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zero-drift, single-supply, rail-to-rail input/output operational amplifiers ad8551/ad8552/ad8554 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?1999C2007 analog devices, inc. all rights reserved. features low offset voltage: 1 v input offset drift: 0.005 v/c rail-to-rail input and output swing 5 v/2.7 v single-supply operation high gain, cmrr, psrr: 130 db ultralow input bias current: 20 pa low supply current: 700 a/op amp overload recovery time: 50 s no external capacitors required applications temperature sensors pressure sensors precision current sensing strain gage amplifiers medical instrumentation thermocouple amplifiers general description this family of amplifiers has ultralow offset, drift, and bias current. the ad8551, ad8552, and ad8554 are single, dual, and quad amplifiers featuring rail-to-rail input and output swings. all are guaranteed to operate from 2.7 v to 5 v with a single supply. the ad855x family provides the benefits previously found only in expensive auto-zeroing or chopper-stabilized amplifiers. using analog devices, inc. topology, these new zero-drift amplifiers combine low cost with high accuracy. no external capacitors are required. with an offset voltage of only 1 v and drift of 0.005 v/c, the ad855x are perfectly suited for applications in which error sources cannot be tolerated. temperature, position and pressure sensors, medical equipment, and strain gage amplifiers benefit greatly from nearly zero drift over their operating temperature range. the rail-to-rail input and output swings provided by the ad855x family make both high-side and low-side sensing easy. the ad855x family is specified for the extended industrial/auto motive temperature range (?40c to +125c). the ad8551 single amplifier is available in 8-lead msop and 8-lead narrow soic packages. the ad8552 dual amplifier is available in 8-lead narrow soic and 8-lead tssop surface-mount packages. the ad8554 quad is available in 14-lead narrow soic and 14-lead tssop packages. pin configurations ? in a + in a v? v+ out a nc nc nc = no connect nc 18 ad8551 45 0 1101-001 figure 1. 8-lead msop (rm suffix) ?in a v? +in a v+ out a nc nc nc nc = no connect ad8551 1 2 3 4 8 7 6 5 0 1101-002 figure 2. 8-lead soic (r suffix) ?in a +in a v? out b ?in b +in b out a v+ 18 ad8552 45 01101-003 figure 3. 8-lead tssop (ru suffix) ?in a v? +in a out b ?in b v+ +in b out a ad8552 1 2 3 4 8 7 6 5 01101-004 figure 4. 8-lead soic (r suffix) out a ?in a +in a v+ ?in d +in d v? out d +in b ?in b out b ?in c out c +in c ad8554 114 78 0 1101-005 figure 5. 14-lead tssop (ru suffix) 14 13 12 11 10 9 8 1 2 3 4 5 6 7 ?in a +in a v+ +in b ?in b out b out d ?in d +in d v? +in c ?in c out c out a ad8554 01101-006 figure 6. 14-lead soic (r suffix)
ad8551/ad8552/ad8554 rev. c | page 2 of 24 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 pin configurations ........................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics ............................................................. 3 absolute maximum ratings ............................................................ 5 thermal characteristics .............................................................. 5 esd caution .................................................................................. 5 typical performance characteristics ............................................. 6 functional description .................................................................. 14 amplifier architecture .............................................................. 14 basic auto-zero amplifier theory .......................................... 14 high gain, cmrr, psrr .......................................................... 16 maximizing performance through proper layout ............... 16 1/f noise characteristics ........................................................... 16 intermodulation distortion ...................................................... 17 broadband and external resistor noise considerations ...... 18 output overdrive recovery ...................................................... 18 input overvoltage protection ................................................... 18 output phase reversal ............................................................... 19 capacitive load drive ............................................................... 19 power-up behavior .................................................................... 19 applications ..................................................................................... 20 5 v precision strain gage circuit .......................................... .. 20 3 v instrumentation amplifier ................................................ 20 high accuracy thermocouple amplifier ........................ ....... 21 precision current meter ............................................................ 21 precision voltage comparator .................................................. 21 outline dimensions ....................................................................... 22 ordering guide .......................................................................... 23 revision history 3/07rev. b to rev. c changes to specifications section.................................................. 3 2/07rev. a to rev. b updated format..................................................................universal changes to figure 54...................................................................... 16 deleted spice model section......................................................... 19 deleted figure 63, renumbered sequentially ............................ 19 changes to ordering guide .......................................................... 24 11/02rev. 0 to rev. a edits to figure 60............................................................................ 16 updated outline dimensions ....................................................... 20
ad8551/ad8552/ad8554 rev. c | page 3 of 24 specifications electrical characteristics v s = 5 v, v cm = 2.5 v, v o = 2.5 v, t a = 25c, unless otherwise noted. table 1. parameter symbol conditions min typ max unit input characteristics offset voltage v os 1 5 v ?40c t a +125c 10 v input bias current i b 10 50 pa ad8551/ad8554 ?40c t a +125c 1.0 1.5 na ad8552 ?40c t a +85c 160 300 pa ad8552 ?40c t a +125c 2.5 4 na input offset current i os 20 70 pa ad8551/ad8554 ?40c t a +125c 150 200 pa ad8552 ?40c t a +85c 30 150 pa ad8552 ?40c t a +125c 150 400 pa input voltage range 0 5 v common-mode rejection ratio cmrr v cm = 0 v to +5 v 120 140 db ?40c t a +125c 115 130 db large signal voltage gain 1 a vo r l = 10 k, v o = 0.3 v to 4.7 v 125 145 db ?40c t a +125c 120 135 db offset voltage drift v os /t ?40c t a +125c 0.005 0.04 v/c output characteristics output voltage high v oh r l = 100 k to gnd 4.99 4.998 v r l = 100 k to gnd @ ?40c to +125c 4.99 4.997 v r l = 10 k to gnd 4.95 4.98 v r l = 10 k to gnd @ ?40c to +125c 4.95 4.975 v output voltage low v ol r l = 100 k to v+ 1 10 mv r l = 100 k to v+ @ ?40c to +125c 2 10 mv r l = 10 k to v+ 10 30 mv r l = 10 k to v+ @ ?40c to +125c 15 30 mv output short-circuit limit current i sc 25 50 ma ?40c to +125c 40 ma output current i o 30 ma ?40c to +125c 15 ma power supply power supply rejection ratio psrr v s = 2.7 v to 5.5 v 120 130 db ?40c t a +125c 115 130 db supply current/amplifier i sy v o = 0 v 850 975 a ?40c t a +125c 1000 1075 a dynamic performance slew rate sr r l = 10 k 0.4 v/s overload recovery time 0.05 0.3 ms gain bandwidth product gbp 1.5 mhz noise performance voltage noise e n p-p 0 hz to 10 hz 1.0 v p-p e n p-p 0 hz to 1 hz 0.32 v p-p voltage noise density e n f = 1 khz 42 nv/hz current noise density i n f = 10 hz 2 fa/hz 1 gain testing is dependent upon test bandwidth.
ad8551/ad8552/ad8554 rev. c | page 4 of 24 v s = 2.7 v, v cm = 1.35 v, v o = 1.35 v, t a = 25c, unless otherwise noted. table 2. parameter symbol conditions min typ max unit input characteristics offset voltage v os 1 5 v ?40c t a +125c 10 v input bias current i b 10 50 pa ad8551/ad8554 ?40c t a +125c 1.0 1.5 na ad8552 ?40c t a +85c 160 300 pa ad8552 ?40c t a +125c 2.5 4 na input offset current i os 10 50 pa ad8551/ad8554 ?40c t a +125c 150 200 pa ad8552 ?40c t a +85c 30 150 pa ad8552 ?40c t a +125c 150 400 pa input voltage range 0 2.7 v common-mode rejection ratio cmrr v cm = 0 v to 2.7 v 115 130 db ?40c t a +125c 110 130 db large signal voltage gain 1 a vo r l = 10 k, v o = 0.3 v to 2.4 v 110 140 db ?40c t a +125c 105 130 db offset voltage drift v os /t ?40c t a +125c 0.005 0.04 v/c output characteristics output voltage high v oh r l = 100 k to gnd 2.685 2.697 v r l = 100 k to gnd @ ?40c to +125c 2.685 2.696 v r l = 10 k to gnd 2.67 2.68 v r l = 10 k to gnd @ ?40c to +125c 2.67 2.675 v output voltage low v ol r l = 100 k to v+ 1 10 mv r l = 100 k to v+ @ ?40c to +125c 2 10 mv r l = 10 k to v+ 10 20 mv r l = 10 k to v+ @ ?40c to +125c 15 20 mv short-circuit limit i sc 10 15 ma ?40c to +125c 10 ma output current i o 10 ma ?40c to +125c 5 ma power supply power supply rejection ratio psrr v s = 2.7 v to 5.5 v 120 130 db ?40c t a +125c 115 130 db supply current/amplifier i sy v o = 0 v 750 900 a ?40c t a +125c 950 1000 a dynamic performance slew rate sr r l = 10 k 0.5 v/s overload recovery time 0.05 ms gain bandwidth product gbp 1 mhz noise performance voltage noise e n p-p 0 hz to 10 hz 1.6 v p-p voltage noise density e n f = 1 khz 75 nv/hz current noise density i n f = 10 hz 2 fa/hz 1 gain testing is dependent upon test bandwidth.
ad8551/ad8552/ad8554 rev. c | page 5 of 24 absolute maximum ratings table 3. parameter rating supply voltage 6 v input voltage gnd to v s + 0.3 v differential input voltage 1 5.0 v esd (human body model) 2000 v output short-circuit duration to gnd indefinite storage temperature range ?65c to +150c operating temperature range ?40c to +125c junction temperature range ?65c to +150c lead temperature range (soldering, 60 sec) 300c 1 differential input voltage is limited to 5.0 v or the supply voltage, whichever is less. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal characteristics table 4. package type ja jc unit 8-lead msop (rm) 190 44 c/w 8-lead tssop (ru) 240 43 c/w 8-lead soic (r) 158 43 c/w 14-lead tssop (ru) 180 36 c/w 14-lead soic (r) 120 36 c/w esd caution
ad8551/ad8552/ad8554 rev. c | page 6 of 24 typical performance characteristics offset voltage (v) number of amplifiers 180 0 ?2.5 0.5 120 100 60 20 2.5 40 80 140 160 ?1.5 ?0.5 1.5 v sy = 2.7v v cm = 1.35v t a = 25c 01101-007 figure 7. input offset voltage distribution at 2.7 v input common-mode voltage (v) input bias current (pa) 50 ?30 5 40 30 20 ?10 ?20 10 0 v sy = 5v t a = ?40c, +25c, +85c +85c +25c ?40c 01 234 01101-008 figure 8. input bias current vs. common-mode voltage input common-mode voltage (v) input bias current (pa) 1500 ?2000 1000 500 0 ?1000 ?1500 ?500 01234 v sy = 5v t a = 125c 01101-009 5 figure 9. input bias current vs. common-mode voltage number of amplifiers 180 0 120 100 60 20 40 80 140 160 ?2.5 ?1.5 ?0.5 1.5 offset voltage (v) 0.5 2.5 v sy = 5v v cm = 2.5v t a = 25c 01101-010 figure 10. input offset voltage distribution at 5 v number of amplifiers 12 0 10 8 4 2 6 input offset drift (nv/c) 0123 4 56 v sy = 5v v cm = 2.5v t a = ?40c to +125c 01101-011 figure 11. input offset voltage drift distribution at 5 v load current (ma) 10 0.1 output voltage (mv) 1 100 10k 1k 0.0001 0.001 0.01 0.1 1 10 100 v sy = 5v t a = 25c source sink 01101-012 figure 12. output voltage to supply rail vs. load current at 5 v
ad8551/ad8552/ad8554 rev. c | page 7 of 24 load current (ma) 10 0.1 output voltage (mv) 1 100 10k 1k 0.0001 0.001 0.01 0.1 1 10 100 v sy = 2.7v t a = 25c source sink 01101-013 figure 13. output voltage to supply rail vs. load current at 2.7 v input bias current (pa) 0 ?1000 ?75 ?50 125 ?25 100 ?250 ?500 ?750 150 v cm = 2.5v v sy = 5v temperature (c) 0255075 01101-014 figure 14. input bias current vs. temperature supply current (ma) 1.0 0 ?75 ?50 125 ?25 100 150 temperature (c) 0255075 0.8 0.6 0.4 0.2 v cm = 2.5v v sy = 5v 5v 2.7v 01101-015 figure 15. supply current vs. temperature supply voltage (v) supply current per amplifier (a) 800 0 700 400 300 200 100 600 500 06 1 t a = +25c 2345 0 1101-016 figure 16. supply current per amplifier vs. supply voltage frequency (hz) open-loop gain (db) 60 50 ?40 40 30 20 10 0 ?10 ?20 ?30 45 90 135 180 225 270 0 phase shift (degrees) v sy = 2.7v c l = 0pf r l = 10k 100k 1m 10m 100m 01101-017 figure 17. open-loop gain and phase shift vs. frequency at 2.7 v frequency (hz) open-loop gain (db) 60 50 ?40 40 30 20 10 0 ?10 ?20 ?30 45 90 135 180 225 270 0 phase shift (degrees) v sy = 5v c l = 0pf r l = 10k 100k 1m 10m 100m 0 1101-018 figure 18. open-loop gain and phase shift vs. frequency at 5 v
ad8551/ad8552/ad8554 rev. c | page 8 of 24 closed-loop gain (db) frequency (hz) 60 50 ?40 40 30 20 10 0 ?10 ?20 ?30 10k 100k 1m 10m 100 v sy = 2.7v c l = 0pf r l = 2k ? a v = ?100 a v = ?10 a v = +1 1k 01101-019 figure 19. closed-loop gain vs. frequency at 2.7 v closed-loop gain (db) frequency (hz) 60 50 ?40 40 30 20 10 0 ?10 ?20 ?30 10k 100k 1m 10m 100 v sy = 5v c l = 0pf r l = 2k ? a v = ?100 a v = ?10 a v = +1 1k 01101-020 figure 20. closed-loop gain vs. frequency at 5 v output impedance ( ? ) 300 270 0 240 210 180 150 120 90 60 30 frequency (hz) 10k 100k 1m 10m 100 1k v sy = 2.7v a v = 100 a v = 10 a v = 1 01101-021 figure 21. output impedanc e vs. frequency at 2.7 v output impedance ( ? ) 300 270 0 240 210 180 150 120 90 60 30 frequency (hz) 10k 100k 1m 10m 100 1k v sy = 5v a v = 100 a v = 10 a v = 1 01101-022 figure 22. output impeda nce vs. frequency at 5 v 2s v sy = 2.7v c l = 300pf r l = 2k ? a v = 1 500mv 01101-023 figure 23. large signal transient response at 2.7 v 5s v sy = 5v c l = 300pf r l = 2k ? a v = 1 1v 0 1101-024 figure 24. large signal transient response at 5 v
ad8551/ad8552/ad8554 rev. c | page 9 of 24 5s v sy = 1.35v c l = 50pf r l = a v = 1 50mv 01101-025 figure 25. small signal transient response at 2.7 v 5s v sy = 2.5v c l = 50pf r l = a v = 1 50mv 0 1101-026 figure 26. small signal transient response at 5 v capacitance (pf) small signal overshoot (%) 50 45 0 40 35 30 25 20 15 10 5 +os ?os 10 100 1k 10k v sy = 1.35v r l = 2k ? t a = 25c 01101-027 figure 27. small signal overshoot vs. load capacitance at 2.7 v capacitance (pf) small signal overshoot (%) 45 0 40 35 30 25 20 15 10 5 10 100 1k 10k v sy = 2.5v r l = 2k ? t a = 25c ?os +os 01101-028 figure 28. small signal overshoot vs. load capacitance at 5 v 20s v sy = 2.5v v in = ?200mv p-p (ret to gnd) c l = 0pf r l = 10k ? a v = ?100 1v bottom scale: 1v/div top scale: 200mv/div 0v v in v out 0v 01101-029 figure 29. positive overvoltage recovery 20s v sy = 2.5v v in = 200mv p-p (ret to gnd) c l = 0pf r l = 10k ? a v = ?100 1v bottom scale: 1v/div top scale: 200mv/div 0v v in v out 0v 01101-030 figure 30. negative overvoltage recovery
ad8551/ad8552/ad8554 rev. c | page 10 of 24 200s 1v v s = 2.5v r l = 2k ? a v = ?100 v in = 60mv p-p 01101-031 figure 31. no phase reversal frequency (hz) cmrr (db) 140 80 0 60 120 20 40 100 10k 100k 1m 10m 100 1k v sy = 2.7v 0 1101-032 figure 32. cmrr vs. frequency at 2.7 v frequency (hz) cmrr (db) 140 80 0 60 120 20 40 100 10k 100k 1m 10m 100 1k v sy = 5v 0 1101-033 figure 33. cmrr vs. frequency at 5 v frequency (hz) psrr (db) 140 80 0 60 120 20 40 100 10k 100k 1m 10m 100 1k v sy = 1.35v ?psrr +psrr 01101-034 figure 34. psrr vs. frequency at 1.35 v frequency (hz) psrr (db) 140 80 0 60 120 20 40 100 10k 100k 1m 10m 100 1k v sy = 2.5v ?psrr +psrr 01101-035 figure 35. psrr vs. frequency at 2.5 v output swing (v p-p) 3.0 2.5 0 2.0 1.5 0.5 1.0 v sy = 1.35v r l = 2k ? a v = 1 thd+n < 1% t a = 25c frequency (hz) 10k 100k 1m 100 1k 01101-036 figure 36. maximum output swing vs. frequency at 2.7 v
ad8551/ad8552/ad8554 rev. c | page 11 of 24 3.0 2.5 2.0 1.5 0.5 1.0 3.5 4.0 4.5 5.0 5.5 0 output swing (v p-p) frequency (hz) 10k 100k 1m 100 1k v sy = 2.5v r l = 2k ? a v = 1 thd+n < 1% t a = 25c 01101-037 figure 37. maximum output swing vs. frequency at 5 v 0 v 1s 2mv v sy = 1.35v a v = 10000 01101-038 figure 38. 0.1 hz to 10 hz noise at 2.7 v 1s 2mv v sy = 2.5v a v = 10000 01101-039 figure 39. 0.1 hz to 10 hz noise at 5 v 0.5 frequency (khz) 0 52 78 104 130 156 182 26 v sy = 2.7v r s = 0 ? e n (nv/ hz) 1.0 1.5 2.0 2.5 01101-040 figure 40. voltage noise density at 2.7 v from 0 hz to 2.5 khz 5 frequency (khz) 0 32 48 64 80 96 112 16 v sy = 2.7v r s = 0 ? e n (nv/ hz) 10 15 20 25 01101-041 figure 41. voltage noise density at 2.7 v from 0 hz to 25 khz 0.5 frequency (khz) 0 26 39 52 65 78 91 13 v sy = 5v r s = 0 ? e n (nv/ hz) 1.0 1.5 2.0 2.5 0 1101-042 figure 42. voltage noise density at 5 v from 0 hz to 2.5 khz
ad8551/ad8552/ad8554 rev. c | page 12 of 24 5 frequency (khz) 0 32 48 64 80 96 112 16 v sy = 5v r s = 0 ? e n (nv/ hz) 10 15 20 25 01101-043 figure 43. voltage noise density at 5 v from 0 hz to 25 khz frequency (hz) 0 48 72 96 120 144 168 24 v sy = 5v r s = 0 ? e n (nv/ hz) 51 0 01101-044 figure 44. voltage noise density at 5 v from 0 hz to 10 hz temperature (c) power supply rejection (db) 150 145 125 140 135 130 ?75 ?50 ?25 0 25 50 75 100 125 150 v sy = 2.7v to 5.5v 01101-045 figure 45. power supply rejection vs. temperature ?10 50 30 ?50 10 ?40 ?30 ?20 0 20 40 temperature (c) short-circuit current (ma) ?75 ?50 ?25 0 25 50 75 100 125 150 v sy = 2.7v i sc? i sc+ 0 1101-046 figure 46. output short-circ uit current vs. temperature
ad8551/ad8552/ad8554 rev. c | page 13 of 24 ?20 100 60 ?100 20 ?80 ?60 ?40 0 40 80 temperature (c) short-circuit current (ma) ?75 ?50 ?25 0 25 50 75 100 125 150 v sy = 5.0v i sc? i sc+ 01101-047 100 250 200 0 150 25 50 75 125 175 225 temperature (c) output voltage to supply rail (mv) ?75 ?50 ?25 0 25 50 75 100 125 150 v sy = 5.0v r l = 1k ? r l = 100k ? r l = 10k ? 0 1101-049 figure 49. output voltage to supply rail vs. temperature figure 47. output short-circ uit current vs. temperature 100 250 200 0 150 25 50 75 125 175 225 temperature (c) output voltage to supply rail (mv) ?75 ?50 ?25 0 25 50 75 100 125 150 v sy = 2.7v r l = 1k ? r l = 100k ? r l = 10k ? 0 1101-048 figure 48. output voltage to supply rail vs. temperature
ad8551/ad8552/ad8554 rev. c | page 14 of 24 functional description the ad855x family of amplifiers are high precision, rail-to-rail operational amplifiers that can be run from a single-supply voltage. their typical offset voltage of less than 1 v allows these amplifiers to be easily configured for high gains without risk of excessive output voltage errors. the extremely small temperature drift of 5 nv/c ensures a minimum of offset voltage error over its entire temperature range of ?40c to +125c, making the ad855x amplifiers ideal for a variety of sensitive measurement applications in harsh operating environments, such as underhood and braking/suspension systems in automobiles. the ad855x family are cmos amplifiers and achieve their high degree of precision through auto-zero stabilization. this autocorrection topology allows the ad855x to maintain its low offset voltage over a wide temperature range and over its operating lifetime. amplifier architecture each ad855x op amp consists of two amplifiers, a main ampli- fier and a secondary amplifier, used to correct the offset voltage of the main amplifier. both consist of a rail-to-rail input stage, allowing the input common-mode voltage range to reach both supply rails. the input stage consists of an nmos differential pair operating concurrently with a parallel pmos differential pair. the outputs from the differential input stages are combined in another gain stage whose output is used to drive a rail-to-rail output stage. the wide voltage swing of the amplifier is achieved by using two output transistors in a common-source configuration. the output voltage range is limited by the drain-to-source resistance of these transistors. as the amplifier is required to source or sink more output current, the r ds of these transistors increases, raising the voltage drop across these transistors. simply put, the output voltage does not swing as close to the rail under heavy output current conditions as it does with light output current. this is a characteristic of all rail-to-rail output amplifiers. figure 12 and figure 13 show how close the output voltage can get to the rails with a given output current. the output of the ad855x is short-circuit protected to approximately 50 ma of current. the ad855x amplifiers have exceptional gain, yielding greater than 120 db of open-loop gain with a load of 2 k. because the output transistors are configured in a common-source configuration, the gain of the output stage, and thus the open- loop gain of the amplifier, is dependent on the load resistance. open-loop gain decreases with smaller load resistances. this is another characteristic of rail-to-rail output amplifiers. basic auto-zero amplifier theory autocorrection amplifiers are not a new technology. various ic implementations have been available for more than 15 years with some improvements made over time. the ad855x design offers a number of significant performance improvements over previous versions while attaining a very substantial reduction in device cost. this section offers a simplified explanation of how the ad855x is able to offer extremely low offset voltages and high open-loop gains. as noted in the amplifier architecture section, each ad855x op amp contains two internal amplifiers. one is used as the primary amplifier, the other as an autocorrection, or nulling, amplifier. each amplifier has an associated input offset voltage that can be modeled as a dc voltage source in series with the noninverting input. in figure 50 and figure 51 these are labeled as v osx , where x denotes the amplifier associated with the offset: a for the nulling amplifier and b for the primary amplifier. the open-loop gain for the +in and ?in inputs of each amplifier is given as a x . both amplifiers also have a third voltage input with an associated open-loop gain of b x . there are two modes of operation determined by the action of two sets of switches in the amplifier: an auto-zero phase and an amplification phase. auto-zero phase in this phase, all a switches are closed and all b switches are opened. here, the nulling amplifier is taken out of the gain loop by shorting its two inputs together. of course, there is a degree of offset voltage, shown as v osa , inherent in the nulling amplifier which maintains a potential difference between the +in and ?in inputs. the nulling amplifier feedback loop is closed through b 2 and v osa appears at the output of the nulling amp and on c m1 , an internal capacitor in the ad855x. mathematically, this is expressed in the time domain as v oa [ t ] = a a v osa [ t ] ? b b a v oa [ t ] (1) which can be expressed as [] [ ] a osaa oa b tva tv + = 1 (2) this demonstrates that the offset voltage of the nulling amplifier times a gain factor appears at the output of the nulling amplifier and, thus, on the c m1 capacitor.
ad8551/ad8552/ad8554 rev. c | page 15 of 24 + a b b b c m2 v in+ v nb c m1 v oa ?b a v na b a a a v osa b a v out v in? 01101-050 figure 50. auto-zero phase of the ad855x amplification phase when the b switches close and the a switches open for the amplification phase, this offset voltage remains on c m1 and, essentially, corrects any error from the nulling amplifier. the voltage across c m1 is designated as v na . furthermore, v in is designated as the potential difference between the two inputs to the primary amplifier, or v in = (v in+ ? v in? ). thus, the nulling amplifier can be expressed as > > > tvbtvtvatv naa osa in a oa ][ (3) + a b b b c m2 v in+ v nb c m1 v oa ?b a v na b a a a v osa b a v out v in? 01101-051 figure 51. output phase of the amplifier because a is now open and there is no place for c m1 to discharge, the voltage (v na ), at the present time (t), is equal to the voltage at the output of the nulling amp (v oa ) at the time when a was closed. if the period of the autocorrection switching frequency is labeled t s , then the amplifier switches between phases every 0.5 t s . therefore, in the amplification phase > s na na ttvtv 2 1 (4) substituting equation 4 and equation 2 into equation 3 yields > > > a s osaaa osaa in a oa b ttvba tvatvatv 1 2 1 (5) for the sake of simplification, assume that the autocorrection frequency is much faster than any potential change in v osa or v osb . this is a valid assumption because changes in offset voltage are a function of temperature variation or long-term wear time, both of which are much slower than the auto-zero clock frequency of the ad855x. this effectively renders v > > a osaaa osaaa in a oa b vbavba tvatv 1 1 (6) or > > a osa in a oa b v tvatv 1 (7) from these equations, the auto-zeroing action becomes evident. note the v os term is reduced by a 1 + b a factor. this shows how the nulling amplifier has greatly reduced its own offset voltage error even before correcting the primary amplifier. this results in the primary amplifier output voltage becoming the voltage at the output of the ad855x amplifier. it is equal to > > nbb osb inb out vbvtvatv (8) in the amplification phase, v oa = v nb , so this can be rewritten as > > > a osb in a b osb b inb out b v tvabvatvatv 1 (9) combining terms, > > osa b a osa aa bbbin out va b vba baatvtv 1 (10) the ad855x architecture is optimized in such a way that a a = a b and b a b = b b os time invariant; therefore, equation 5 can be rearranged and rewritten as b b b and b a b >> 1 also, the gain product of a a b b b is much greater than a b b . these allow equation 10 to be simplified to > > osb osaaaa in out vvabatvtv (11) most obvious is the gain product of both the primary and nulling amplifiers. this a a b b a term is what gives the ad855x its extremely high open-loop gain. to understand how v osa and v osb b relate to the overall effective input offset voltage of the complete amplifier, establish the generic amplifier equation of eff os in out vvkv , u (12) where k is the open-loop gain of an amplifier and v os, eff is its effective offset voltage. putting equation 12 into the form of equation 11 gives > > aaeffosaa in out bavbatvtv , (13) thus, it is evident that a osb osa effos b vv v , (14) the offset voltages of both the primary and nulling amplifiers are reduced by the gain factor b a . this takes a typical input offset voltage from several millivolts down to an effective input offset voltage of submicrovolts. this autocorrection scheme is the outstanding feature of the ad855x series that continues to
ad8551/ad8552/ad8554 rev. c | page 16 of 24 earn the reputation of being among the most precise amplifiers available on the market. high gain, cmrr, psrr common-mode and power supply rejection are indications of the amount of offset voltage an amplifier has as a result of a change in its input common-mode or power supply voltages. as shown in the previous section, the autocorrection architecture of the ad855x allows it to quite effectively minimize offset volt- ages. the technique also corrects for offset errors caused by common-mode voltage swings and power supply variations. this results in superb cmrr and psrr figures in excess of 130 db. because the autocorrection occurs continuously, these figures can be maintained across the entire temperature range of the device, from ?40c to +125c. maximizing performance through proper layout to achieve the maximum performance of the extremely high input impedance and low offset voltage of the ad855x, care is needed in laying out the circuit board. the pc board surface must remain clean and free of moisture to avoid leakage cur- rents between adjacent traces. surface coating of the circuit board reduces surface moisture and provides a humidity barrier, reducing parasitic resistance on the board. the use of guard rings around the amplifier inputs further reduces leakage cur- rents. figure 52 shows proper guard ring configuration, and figure 53 shows the top view of a surface-mount layout. the guard ring does not need to be a specific width, but it should form a continuous loop around both inputs. by setting the guard ring voltage equal to the voltage at the noninverting input, parasitic capacitance is minimized as well. for further reduction of leakage currents, components can be mounted to the pc board using teflon standoff insulators. ad8552 ad8552 ad8552 v out v out v out v in v in v in 0 1101-052 figure 52. guard ring layout and connections to reduce pc board leakage currents v + ad8552 v? r 2 r 1 r 1 r 2 v ref v ref v in2 guard ring guard ring v in1 01101-053 figure 53. top view of ad8552 soic layout with guard rings other potential sources of offset error are thermoelectric voltages on the circuit board. this voltage, also called seebeck voltage, occurs at the junction of two dissimilar metals and is proportional to the temperature of the junction. the most common metallic junctions on a circuit board are solder-to- board trace and solder-to-component lead. figure 54 shows a cross-section of the thermal voltage error sources. if the temperature of the pc board at one end of the component (t a1 ) is different from the temperature at the other end (t a2 ), the resulting seebeck voltages are not equal, resulting in a thermal voltage error. this thermocouple error can be reduced by using dummy components to match the thermoelectric error source. placing the dummy component as close as possible to its partner ensures both seebeck voltages are equal, thus canceling the thermo- couple error. maintaining a constant ambient temperature on the circuit board further reduces this error. the use of a ground plane helps distribute heat throughout the board and reduces emi noise pickup. solder + + + + component lead copper trace v sc1 v ts1 t a1 surface-mount component pc board t a2 v sc2 v ts2 if t a1 t a2 , then v ts1 + v sc1 v ts2 + v sc2 0 1101-054 figure 54. mismatch in seebeck voltages causes thermoelectric voltage error ad8551/ ad8552/ ad8554 a v = 1 + (r f /r 1 ) notes 1. r s should be placed in close proximity and alignment to r 1 to balance seebeck voltages. r s = r 1 r 1 r f v in v out 01101-055 figure 55. using dummy co mponents to cancel thermoelectric voltage errors 1/f noise characteristics another advantage of auto-zero amplifiers is their ability to cancel flicker noise. flicker noise, also known as 1/f noise, is noise inherent in the physics of semiconductor devices, and it increases 3 db for every octave decrease in frequency. the 1/f corner frequency of an amplifier is the frequency at which the flicker noise is equal to the broadband noise of the amplifier. at lower frequencies, flicker noise dominates, causing higher degrees of error for sub-hertz frequencies or dc precision applications.
ad8551/ad8552/ad8554 rev. c | page 17 of 24 because the ad855x amplifiers are self-correcting op amps, they do not have increasing flicker noise at lower frequencies. in essence, low frequency noise is treated as a slowly varying offset error and is greatly reduced as a result of autocorrection. the correction becomes more effective as the noise frequency approaches dc, offsetting the tendency of the noise to increase exponentially as frequency decreases. this allows the ad855x to have lower noise near dc than standard low noise amplifiers that are susceptible to 1/f noise. intermodulation distortion the ad855x can be used as a conventional op amp for gain/ bandwidth combinations up to 1.5 mhz. the auto-zero correction frequency of the device is fixed at 4 khz. although a trace amount of this frequency feeds through to the output, the amplifier can be used at much higher frequencies. figure 56 shows the spectral output of the ad8552 with the amplifier configured for unity gain and the input grounded. the 4 khz auto-zero clock frequency appears at the output with less than 2 v of amplitude. harmonics are also present, but at reduced levels from the fundamental auto-zero clock frequency. the amplitude of the clock frequency feedthrough is proportional to the closed-loop gain of the amplifier. like other autocorrection amplifiers, at higher gains there is more clock frequency feedthrough. figure 57 shows the spectral output with the amplifier configured for a gain of 60 db. frequency (khz) 0 ?140 01 0 1 output signal (db) ?20 ?40 ?60 ?80 ?100 ?120 23456789 v sy = 5v a v = 0db 01101-056 figure 56. spectral analysis of ad8552 output in unity gain configuration frequency (khz) 0 ?140 01 1 output signal (db) ?20 ?40 ?60 ?80 ?100 ?120 23456789 0 v sy = 5v a v = 60db 01101-057 figure 57. spectral analysis of ad855x output with +60 db gain when an input signal is applied, the output contains some degree of intermodulation distortion (imd). this is another characteristic feature of all autocorrection amplifiers. imd appears as sum and difference frequencies between the input signal and the 4 khz clock frequency (and its harmonics) and is at a level similar to, or less than, the clock feedthrough at the output. the imd is also proportional to the closed-loop gain of the amplifier. figure 58 shows the spectral output of an ad8552 configured as a high gain stage (+60 db) with a 1 mv input signal applied. the relative levels of all imd products and harmonic distortion add up to produce an output error of ?60 db relative to the input signal. at unity gain, these add up to only ?120 db relative to the input signal. imd < 100v rms output signal 1v rms @ 200hz frequency (khz) 0 01 0 1 output signal (db) ?20 ?40 ?60 ?80 ?100 ?120 23456789 v sy = 5v a v = 60db 0 1101-058 figure 58. spectral analysis of ad8552 in high gain with a 1 mv input signal for most low frequency applications, the small amount of auto- zero clock frequency feedthrough does not affect the precision of the measurement system. if it is desired, the clock frequency feedthrough can be reduced through the use of a feedback capacitor around the amplifier. however, this reduces the bandwidth of the amplifier. figure 59 and figure 60 show a configuration for reducing the clock feedthrough and the corresponding spectral analysis at the output. the ?3 db bandwidth of this configuration is 480 hz.
ad8551/ad8552/ad8554 rev. c | page 18 of 24 100 ? 100k ? 3.3n f v in = 1mv rms @ 200hz 01101-059 figure 59. reducing autocorrection clock noise using a feedback capacitor frequency (khz) 0 0 1 output signal ?20 ?40 ?60 ?80 ?100 ?120 23456789 1 0 v sy = 5v a v = 60db 01101-060 figure 60. spectral analysis using a feedback capacitor broadband and external resistor noise considerations the total broadband noise output from any amplifier is primarily a function of three types of noise: input voltage noise from the amplifier, input current noise from the amplifier, and johnson noise from the external resistors used around the amplifier. input voltage noise, or e n , is strictly a function of the amplifier used. the johnson noise from a resistor is a function of the re- sistance and the temperature. input current noise, or i n , creates an equivalent voltage noise proportional to the resistors used around the amplifier. these noise sources are not correlated with each other and their combined noise sums in a root- squared-sum fashion. the full equation is given as > 2 1 2 2 _ 4 s n s n totaln riktree (15) where: e n = the input voltage noise density of the amplifier. i n = the input current noise of the amplifier. r s = source resistance connected to the noninverting terminal. k = boltzmanns constant (1.38 10 ?23 j/k). t = ambient temperature in kelvin (k = 273.15 + c). the input voltage noise density (e n ) of the ad855x is 42 nv/hz, and the input noise, i n , is 2 fa/hz. the e n, total is dominated by the input voltage noise, provided the source resistance is less than 106 k. with source resistance greater than 106 k, the overall noise of the system is dominated by the johnson noise of the resistor itself. because the input current noise of the ad855x is very small, it does not become a dominant term unless r s is greater than 4 g, which is an impractical value of source resistance. the total noise (e n, total ) is expressed in volts per square root hertz, and the equivalent rms noise over a certain bandwidth can be found as bw ee totaln n u , (16) where bw is the bandwidth of interest in hertz. output overdrive recovery the ad855x amplifiers have an excellent overdrive recovery of only 200 s from either supply rail. this characteristic is par- ticularly difficult for autocorrection amplifiers because the nulling amplifier requires a nontrivial amount of time to error correct the main amplifier back to a valid output. figure 29 and figure 30 show the positive and negative overdrive recovery times for the ad855x. the output overdrive recovery for an autocorrection amplifier is defined as the time it takes for the output to correct to its final voltage from an overload state. it is measured by placing the amplifier in a high gain configuration with an input signal that forces the output voltage to the supply rail. the input voltage is then stepped down to the linear region of the amplifier, usually to halfway between the supplies. the time from the input signal stepdown to the output settling to within 100 v of its final value is the overdrive recovery time. input overvoltage protection although the ad855x is a rail-to-rail input amplifier, exercise care to ensure that the potential difference between the inputs does not exceed 5 v. under normal operating conditions, the amplifier corrects its output to ensure the two inputs are at the same voltage. however, if the device is configured as a comparator, or is under some unusual operating condition, the input voltages may be forced to different potentials. this can cause excessive current to flow through internal diodes in the ad855x used to protect the input stage against overvoltage. if either input exceeds either supply rail by more than 0.3 v, large amounts of current begin to flow through the esd pro- tection diodes in the amplifier. these diodes connect between the inputs and each supply rail to protect the input transistors against an electrostatic discharge event and are normally reverse-biased. however, if the input voltage exceeds the supply voltage, these esd diodes become forward-biased. without current limiting, excessive amounts of current can flow through these diodes, causing permanent damage to the device. if inputs are subjected to overvoltage, appropriate series resistors should be inserted to limit the diode current to less than 2 ma maximum.
ad8551/ad8552/ad8554 rev. c | page 19 of 24 output phase reversal output phase reversal occurs in some amplifiers when the input common-mode voltage range is exceeded. as common-mode voltage moves outside of the common-mode range, the outputs of these amplifiers suddenly jump in the opposite direction to the supply rail. this is the result of the differential input pair shutting down and causing a radical shifting of internal voltages, resulting in the erratic output behavior. the ad855x amplifiers have been carefully designed to prevent any output phase reversal, provided both inputs are maintained within the supply voltages. if there is the potential of one or both inputs exceeding either supply voltage, place a resistor in series with the input to limit the current to less than 2 ma to ensure the output does not reverse its phase. capacitive load drive the ad855x family has excellent capacitive load driving capabilities and can safely drive up to 10 nf from a single 5 v supply. although the device is stable, capacitive loading limits the bandwidth of the amplifier. capacitive loads also increase the amount of overshoot and ringing at the output. an r-c snubber network, shown in figure 61 , can be used to compensate the amplifier against capacitive load ringing and overshoot. 5v v in 2 00mv p- p r x 60? c x 0.47f c l 4.7nf v out ad8551/ ad8552/ ad8554 01101-061 figure 61. snubber network configuration for driving capacitive loads although the snubber does not recover the loss of amplifier bandwidth from the load capacitance, it does allow the amplifier to drive larger values of capacitance while maintaining a minimum of overshoot and ringing. figure 62 shows the output of an ad855x driving a 1 nf capacitor with and without a snubber network. with snubber without snubber 10s 100mv v sy = 5v c load = 4.7nf 01101-062 figure 62. overshoot and ringing are substantially reduced using a snubber network the optimum value for the resistor and capacitor is a function of the load capacitance and is best determined empirically because actual c load (c l ) includes stray capacitances and may differ substantially from the nominal capacitive load. table 5 shows some snubber network values that can be used as starting points. table 5. snubber network values for driving capacitive loads c load r x c x 1 nf 200 1 nf 4.7 nf 60 0.47 f 10 nf 20 10 f power-up behavior at power-up, the ad855x settles to a valid output within 5 s. figure 63 shows an oscilloscope photo of the output of the amplifier with the power supply voltage, and figure 64 shows the test circuit. with the amplifier configured for unity gain, the device takes approximately 5 s to settle to its final output voltage. this turn-on response time is much faster than most other autocorrection amplifiers, which can take hundreds of microseconds or longer for their output to settle. v+ 0v 0v v out 5s 1v 01101-063 bottom trace = 2v/div top trace = 1v/div figure 63. ad855x output behavior on power-up v out ad8551/ ad8552/ ad8554 v sy = 0v to 5v 100k ? 100k ? 01101-064 figure 64. ad855x test circuit for turn-on time
ad8551/ad8552/ad8554 rev. c | page 20 of 24 applications 5 v precision strain gage circuit the extremely low offset voltage of the ad8552 makes it an ideal amplifier for any application requiring accuracy with high gains, such as a weigh scale or strain gage. figure 65 shows a configuration for a single-supply, precision, strain gage measurement system. a ref192 provides a 2.5 v precision reference voltage for a2. the a2 amplifier boosts this voltage to provide a 4.0 v refer- ence for the top of the strain gage resistor bridge. q1 provides the current drive for the 350 bridge network. a1 is used to amplify the output of the bridge with the full-scale output voltage equal to () b 21 r rr + 2 (17) where r b is the resistance of the load cell. b using the values given in figure 65 , the output voltage linearly varies from 0 v with no strain to 4.0 v under full strain. notes 1. use 0.1% tolerance resistors. ad8552-a ad8552-b ref192 5v 2.5v 6 4 3 2 4.0v a2 a1 v out 0v to 4.0v 40mv full-scale q1 2n2222 or equivalent 350 ? load cell 1k? 12.0k ? 20k? r 1 17.4k ? r 2 100 ? r 3 17.4k ? r 4 100 ? 0 1101-065 figure 65. a 5 v precision strain gage amplifier 3 v instrumentation amplifier the high common-mode rejection, high open-loop gain, and operation down to 3 v of supply voltage makes the ad855x an excellent choice of op amp for discrete single-supply instrumen- tation amplifiers. the common-mode rejection ratio of the ad855x is greater than 120 db, but the cmrr of the system is also a function of the external resistor tolerances. the gain of the difference amplifier shown in figure 66 is given as ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? + ? ? ? ? ? ? ? ? + = 1 2 2 1 43 4 out r r v r r rr r vv 2 1 1 (18) v 2 v 1 r 1 r 2 v out ad8551/ ad8552/ ad8554 r 3 r 4 if r 4 r 3 r 2 r 1 r 2 r 1 =, then v out = (v1 ? v2) 0 1101-066 figure 66. using the ad855x as a difference amplifier in an ideal difference amplifier, the ratio of the resistors are set exactly equal to 3 4 1 2 v r r r r a == (19) which sets the output voltage of the system to v out = a v ( v1 ? v2 ) (20) due to finite component tolerance, the ratio between the four resistors is not exactly equal, and any mismatch results in a reduction of common-mode rejection from the system. referring to figure 66 , the exact common-mode rejection ratio can be expressed as 3241 324241 rrrr rrrrrr cmrr 22 2 ? + + = (21) in the three-op amp, instrumentation amplifier configuration shown in figure 67 , the output difference amplifier is set to unity gain with all four resistors equal in value. if the tolerance of the resistors used in the circuit is given as , the worst-case cmrr of the instrumentation amplifier is cmrr min 2 1 = (22) v out = 1 + 2r r g (v1 ? v2) r r r r ad8554-c v2 r r v1 ad8554-b a d8554-a r trim r g v out 0 1101-067 figure 67. a discrete instrumentation amplifier configuration consequently, using 1% tolerance resistors results in a worst- case system cmrr of 0.02, or 34 db. therefore, either high precision resistors or an additional trimming resistor, as shown in figure 67 , should be used to achieve high common-mode rejection. the value of this trimming resistor should be equal to the value of r multiplied by its tolerance. for example, using 10 k resistors with 1% tolerance requires a series trimming resistor equal to 100 .
ad8551/ad8552/ad8554 rev. c | page 21 of 24 high accuracy thermocouple amplifier l 1 sense 2 i r r routput monitor ? ? ? ? ? ? ? ? = (23) figure 68 shows a k-type thermocouple amplifier configuration with cold junction compensation. even from a 5 v supply, the ad8551 can provide enough accuracy to achieve a resolution of better than 0.02c from 0c to 500c. d1 is used as a tempera- ture measuring device to correct the cold junction error from the thermocouple and should be placed as close as possible to the two terminating junctions. with the thermocouple measuring tip immersed in a 0c ice bath, r 6 should be adjusted until the output is at 0 v. using the components shown in figure 69 , the monitor output transfer function is 2.5 v/a. figure 70 shows the low-side monitor equivalent. in this circuit, the input common-mode voltage to the ad8552 is at or near ground. again, a 0.1 resistor provides a voltage drop propor- tional to the return current. the output voltage is given as () ? ? ? ? ? ? ? ? ?+= l sense out ir r r vv 1 2 (24) using the values shown in figure 68 , the output voltage tracks temperature at 10 mv/c. for a wider range of temperature measurement, r 9 can be decreased to 62 k. this creates a 5 mv/c change at the output, allowing measurements of up to 1000c. for the component values shown in figure 70 , the output transfer function decreases from v+ at ?2.5 v/a. 8 1 4 3 3v v+ g s d 2 3v 1/2 ad8552 monitor output m1 si9433 r 1 100 ? r 2 2.49k ? r sense 0.1 ? i l 0.1f 0 1101-069 3 2 8 4 5v + ref02ez 12v 2 6 4 d1 1n4148 5.000v 1 ? + ad8551 0.1f 0.1f 10f k-type thermocouple 40.7v/c 0v to 5.00v (0c to 500c) r 4 5.62k ? r 6 200? r 3 53.6 ? r 2 2.74k ? r 1 10.7k ? r 5 40.2k ? r 8 124k? r 7 453? 01101-068 figure 69. a high-side load current monitor figure 68. a precision k-type thermocouple amplifier with cold junction compensation v+ 1/2 ad8552 v + q1 return to ground v out r 2 2.49k ? r 1 100 ? r sense 0.1 ? 0 1101-070 precision current meter because of its low input bias current and superb offset voltage at single supply voltages, the ad855x is an excellent amplifier for precision current monitoring. its rail-to-rail input allows the amplifier to be used as either a high-side or low-side current monitor. using both amplifiers in the ad8552 provides a simple method to monitor both current supply and return paths for load or fault detection. figure 69 shows a high-side current monitor configuration. in this configuration, the input common-mode voltage of the amplifier is at or near the positive supply voltage. the rail-to- rail input of the amplifier provides a precise measurement even with the input common-mode voltage at the supply voltage. the cmos input structure does not draw any input bias current, ensuring a minimum of measurement error. figure 70. a low-side load current monitor precision voltage comparator the ad855x can be operated open-loop and used as a precision comparator. the ad855x has less than 50 v of offset voltage when run in this configuration. the slight increase of offset voltage stems from the fact that the autocorrection architecture operates with lowest offset in a closed-loop configuration, that is, one with negative feedback. with 50 mv of overdrive, the device has a propagation delay of 15 s on the rising edge and 8 s on the falling edge. ensure the maximum differential voltage of the device is not exceeded. for more information, refer to the input overvoltage protection section. the 0.1 resistor creates a voltage drop to the noninverting input of the ad855x. the output of the amplifier is corrected until this voltage appears at the inverting input. this creates a current through r 1 , which in turn flows through r 2 . the monitor output is given by
ad8551/ad8552/ad8554 rev. c | page 22 of 24 outline dimensions compliant to jedec standards mo-187-aa 0.80 0.60 0.40 8 0 4 8 1 5 pin 1 0.65 bsc seating plane 0.38 0.22 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.08 3.20 3.00 2.80 5.15 4.90 4.65 0.15 0.00 0.95 0.85 0.75 figure 71. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters 8 5 41 pin 1 0.65 bsc seating plane 0.15 0.05 0.30 0.19 1.20 max 0.20 0.09 8 0 6.40 bsc 4.50 4.40 4.30 3.10 3.00 2.90 coplanarit y 0.10 0.75 0.60 0.45 compliant to jedec standards mo-153-aa figure 72. 8-lead thin shrink small outline package [tssop] (ru-8) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-a a 060506-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 73. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc seating plane 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 8 0 0.75 0.60 0.45 coplanarity 0.10 compliant to jedec standards mo-153-ab-1 figure 74. 14-lead thin shrink small outline package [tssop] (ru-14) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-ab 060606-a 14 8 7 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) bsc seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarity 0.10 8 0 45 figure 75. 14-lead standard small outline package [soic_n] narrow body (r-14) dimensions shown in millimeters and (inches)
ad8551/ad8552/ad8554 rev. c | page 23 of 24 ordering guide model temperature range package description package option branding ad8551ar ?40c to +125c 8-lead soic_n r-8 ad8551ar-reel ?40c to +125c 8-lead soic_n r-8 ad8551ar-reel7 ?40c to +125c 8-lead soic_n r-8 ad8551arz 1 ?40c to +125c 8-lead soic_n r-8 ad8551arz-reel 1 ?40c to +125c 8-lead soic_n r-8 ad8551arz-reel7 1 ?40c to +125c 8-lead soic_n r-8 ad8551arm-r2 ?40c to +125c 8-lead msop rm-8 aha ad8551arm-reel ?40c to +125c 8-lead msop rm-8 aha AD8551ARMZ-R2 1 ?40c to +125c 8-lead msop rm-8 aha# ad8551armz-reel 1 ?40c to +125c 8-lead msop rm-8 aha# ad8552ar ?40c to +125c 8-lead soic_n r-8 ad8552ar-reel ?40c to +125c 8-lead soic_n r-8 ad8552ar-reel7 ?40c to +125c 8-lead soic_n r-8 ad8552arz 1 ?40c to +125c 8-lead soic_n r-8 ad8552arz-reel 1 ?40c to +125c 8-lead soic_n r-8 ad8552arz-reel7 1 ?40c to +125c 8-lead soic_n r-8 ad8552aru ?40c to +125c 8-lead tssop ru-8 ad8552aru-reel ?40c to +125c 8-lead tssop ru-8 ad8552aruz 1 ?40c to +125c 8-lead tssop ru-8 ad8552aruz-reel 1 ?40c to +125c 8-lead tssop ru-8 ad8554ar ?40c to +125c 14-lead soic_n r-14 ad8554ar-reel ?40c to +125c 14-lead soic_n r-14 ad8554ar-reel7 ?40c to +125c 14-lead soic_n r-14 ad8554arz 1 ?40c to +125c 14-lead soic_n r-14 ad8554arz-reel 1 ?40c to +125c 14-lead soic_n r-14 ad8554arz-reel7 1 ?40c to +125c 14-lead soic_n r-14 ad8554aru ?40c to +125c 14-lead tssop ru-14 ad8554aru-reel ?40c to +125c 14-lead tssop ru-14 ad8554aruz 1 ?40c to +125c 14-lead tssop ru-14 ad8554aruz-reel 1 ?40c to +125c 14-lead tssop ru-14 1 z = rohs compliant part, # denotes rohs compliant part may be top or bottom marked.
ad8551/ad8552/ad8554 rev. c | page 24 of 24 notes ?1999C2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. c01101-0-3/07(c)

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